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电子电路代写 | ECE 520 Project 1

电子电路代写 | ECE 520 Project 1


ECE 520 Project 1

(a) You can work individually or in groups of two. Only one report is required
for each group
(b) PROJECT FILE SHOULD BE <YourName> Project ECE520.pdf
(c) Collaboration and discussion about project between teams is encouraged but please
make sure that each team writes up the report on its own.
1. Use the ampli er topology in Fig. 1. Achieve the following speci cations:
VDD 1.8V
Di erential Gain voutp voutn
vin;p vin;n
> 50 dB
Power Consumption <120 W
AC 3dB bandwidth >1.25MHz
Output DC Voltage 0.6V < VOutN; VOutP < 0.8V
Figure 1: Cascode ampli er with PMOS input
Note: Please use ideal DC voltage sources to generate VBP3; VBN2; VBN1. Generate
VBP1; VBP2 using a reference current of 10 A.
Please report the following –
(a) Quantitative design approach and justi cation for device sizes and tradeo s.
(b) Clear schematics with annotated DC voltages and bias currents through devices along
with the operating points such as VDS and VGS.
(c) Simulated AC performance for di erential mode gain and common-mode gain.
(d) Tar of your cadence library.