This lab introduces the basic I/O capabilities of the DE1-SoC computer, more speciﬁcally, the
slider switches, pushbuttons, LEDs, 7-Segment (HEX) displays and timers. After writing
assembly drivers that interface with the I/O components, timers and interrupts are used to
demonstrate polling and interrupt based applications.
The hardware setup of the I/O components is fairly simple to understand. The ARM cores
have designated addresses in memory that are connected to hardware circuits on the FPGA
through parallel ports, and these hardware circuits, in turn, interface with the physical I/O
components. In most cases of the basic I/Os, the FPGA hardware simply maps the I/O
terminals to the memory address designated to it. There are several parallel ports
implemented in the FPGA that support input, output, and bidirectional transfers of data
between the ARM A9 processor and I/O peripherals. For instance, the state of the slider
switches is available to the FPGA on bus of 10 wires which carry either a logical ’0’ or ’1’ .
The state of the slider switches is then stored in the memory address reserved for the slider
switches ( 0xFF200040 in this case).
It is useful to have a slightly more sophisticated FPGA hardware. For instance, in the case of
the push-buttons, in addition to knowing the state of the button, it is also helpful to know
whether a falling edge is detected, signaling a keypress. This can be achieved by a simple
edge detection circuit in the FPGA. This section will deal with writing assembly code to
control the I/O components by reading from and writing to the memory.
Getting Started: Drivers for slider switches and LEDs
To access the memories designated to the I/O interfaces you need drivers. In other words,
you need to write subroutines (derivers) in order to write to or read from the I/O interface
memories. Therefore, you must follow the conventions you have learned in this course when
describing your drivers in assembly language.